Semiconductor chips typically are connected to external circuitry through contacts on surface of the chip. The contacts may be disposed in a grid on the front surface of the chip or in elongated rows extending along the edges of the chip front surface. Each such contact must be connected to an external circuit element such as a circuit trace on a supporting substrate or circuit panel. In the conventional wire bonding process, the chip is physically mounted on the substrate. A bonding tool bearing a fine wire is engaged with an individual contact so as to bond the wire to the contact. The tool is then moved to a contact pad of the circuit on the substrate while dispensing wire through the tool until the tool engages the contact pad on the substrate and the wire is bonded thereto. This process is repeated for each contact.
In a tape automated bonding or "TAB" process, a dielectric supporting tape is provided with a hole slightly larger than the chip. Metallic leads are provided on the dielectric tape. An inner end of each lead projects inwardly beyond the edge of the hole. These plural leads are arranged side-by-side in rows. Each row of contacts on the chip is aligned with one such row of leads. The inner ends of the leads are bonded to the contacts of the chip by ultrasonic or thermocompression bonding. The outer ends of the leads are connected to the external circuitry.
The rapid evolution of the semiconductor art has created continued demand for incorporation of progressively greater numbers of contacts and leads in a given amount of space. With such closely spaced contacts, the leads connected to the contacts of the chip must be extremely fine structures, typically less than about 0.1 mm wide, disposed at center-to-center spacings of about 0.1 mm or less. Handling and connecting such fine, closely-spaced leads poses a formidable problem.
International Patent Publication WO94/03036, published 3 Feb. 1994 on copending International Application PCT/US93/06930, the disclosure of which is hereby incorporated by reference herein, offers a solution to these problems. As disclosed in the '036 publication, a semiconductor chip connection component may include a plurality of electrically conductive leads and may also include a support structure such as a flexible, dielectric film with a compliant, typically elastomeric underlayer disposed beneath the flexible film. Each such lead desirably is connected to a terminal disposed on the surface of the support structure. A connection section of each lead extends across a gap in the support structure. A first end of each connection section, connected to one of the terminals, is permanently attached to the support structure, whereas the opposite, second end of the connection section is releasably attached to the support structure. For example, the second end of each connection section may be connected through a frangible section connecting the second end to a bus structure anchored on the support structure.
Certain preferred connection components disclosed in the '036 publication have numerous elongated leads disposed side-by-side with the connection sections of the various leads extending across a common gap in the form of a slot in the support structure. In certain processes according to the '036 publication, the connection component is juxtaposed with the chip so that the support structure, and preferably a compliant layer thereof, overlies the contact-bearing surface of the chip and so that the gap or slot in the support structure is aligned with a row of contacts on the chip. This process serves to align each connection section with a contact on the chip. After placement of the connection component on the chip, each lead is engaged by a bonding tool. The bonding tool moves downwardly, towards the surface of the chip. As the bonding tool moves downwardly, it disengages the second end of each lead connection section from the support structure, as by breaking the frangible section of the lead, and moves the connection section downwardly into engagement with the chip contact. At the same time, guide surfaces on the bottom of the bonding tool engage the connection section and guide it into more precise alignment with the associated contact. The bonding tool then bonds the connection section to the contact.
The end-supported lead bonding processes according to preferred aspects of the '036 publication offer numerous advantages. Because each lead is supported at both ends prior to bonding, it can be maintained in position until it is captured by the bonding tool. The bonding tool will reliably capture the correct lead, and hence there is little chance that an incorrect lead will be bonded to a contact. The process can be performed at reasonable cost. Moreover, the products resulting from preferred processes according to the '036 publication, allow free movement of the terminals on the support structure relative to the chip after connection, both in the X and Y directions, parallel to the chip surface, and in the Z or compliance direction perpendicular to the chip surface. Thus, the assembly can be readily tested by engaging a multiple probe test fixture with the terminals. When the terminals on the support structure are bonded to contact pads of a substrate, as by solder bonding or other processes, the assembly can compensate for differential thermal expansion between the chip and the substrate, as by flexing of the leads and deformation of the flexible support structure.
Certain components and processes according to the '036 publication can be used to fabricate semiconductor chip assemblies with closely spaced leads. Merely by way of example, rows of connection section may be provided side-by-side at center-to-center spacings of about 100 micrometers or less, and may be successfully bonded to the contacts of the chip. Additional improvements in the bonding structures and techniques, as set forth in the copending, commonly assigned U.S. patent application Ser. No. 08/308,741 of Thomas DiStefano et al., filed Sep. 19, 1994 entitled Microelectronic Bonding With Lead Motion, now U.S. Pat. No. 5,491,302 and in copending-pending commonly assigned U.S. patent application Ser. No. 08/096,693, filed Jul. 23, 1993, now U.S. Pat. No. 5,398,863 the disclosures of which are hereby incorporated by reference herein, still further facilitate bonding of closely spaced leads and formation of reliable assemblies even where the leads are extremely small, using the basic techniques set forth in the '036 publication.
However, manufacture of the preferred connection components for use in these processes has heretofore required precise control of photoforming processes. The leads utilized in certain end-supported lead bonding processes have incorporated connection sections of substantially uniform widths and frangible sections having widths less than the width of the connection section. For example, the frangible section may be defined by a pair of V-shaped notches extending inwardly towards one another in the widthwise direction from laterally opposite edges of the connection section. The width between the points of the V is substantially less than the width of the remaining portion of the connection section. Although this arrangement provides useful frangible sections, it imposes stringent requirements on the photoforming process. The process must be capable of forming feature sizes as small as the smallest width within the frangible section. Stated another way, the photoforming process must be more precise than required to form the connection sections themselves.
There has, accordingly, been a desire heretofore for improved methods of making connection components useful in end-supported lead bonding and for improved connection components. In particular, there has been a desire for processes which mitigate the requirement for precise photoforming steps in fabrication of such connection components.